182 } else if ((con = in(2)->find_int_con(0)) == 0) {
183 return MulNode::Ideal(phase, can_reshape);
184 }
185
186 // Now we have a constant Node on the right and the constant in con
187 if (con == 0) return NULL; // By zero is handled by Value call
188 if (con == 1) return NULL; // By one is handled by Identity call
189
190 // Check for negative constant; if so negate the final result
191 bool sign_flip = false;
192
193 unsigned int abs_con = uabs(con);
194 if (abs_con != (unsigned int)con) {
195 sign_flip = true;
196 }
197
198 // Get low bit; check for being the only bit
199 Node *res = NULL;
200 unsigned int bit1 = abs_con & (0-abs_con); // Extract low bit
201 if (bit1 == abs_con) { // Found a power of 2?
202 res = new LShiftINode(in(1), phase->intcon(log2_intptr(bit1)));
203 } else {
204
205 // Check for constant with 2 bits set
206 unsigned int bit2 = abs_con-bit1;
207 bit2 = bit2 & (0-bit2); // Extract 2nd bit
208 if (bit2 + bit1 == abs_con) { // Found all bits in con?
209 Node *n1 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_intptr(bit1))));
210 Node *n2 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_intptr(bit2))));
211 res = new AddINode(n2, n1);
212
213 } else if (is_power_of_2(abs_con+1)) {
214 // Sleezy: power-of-2 -1. Next time be generic.
215 unsigned int temp = abs_con + 1;
216 Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2_intptr(temp))));
217 res = new SubINode(n1, in(1));
218 } else {
219 return MulNode::Ideal(phase, can_reshape);
220 }
221 }
222
223 if (sign_flip) { // Need to negate result?
224 res = phase->transform(res);// Transform, before making the zero con
225 res = new SubINode(phase->intcon(0),res);
226 }
227
228 return res; // Return final result
229 }
230
231 //------------------------------mul_ring---------------------------------------
232 // Compute the product type of two integer ranges into this node.
233 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
234 const TypeInt *r0 = t0->is_int(); // Handy access
235 const TypeInt *r1 = t1->is_int();
236
428 }
429
430 return TypeInt::INT; // No constants to be had
431 }
432
433 //------------------------------Identity---------------------------------------
434 // Masking off the high bits of an unsigned load is not required
435 Node* AndINode::Identity(PhaseGVN* phase) {
436
437 // x & x => x
438 if (phase->eqv(in(1), in(2))) return in(1);
439
440 Node* in1 = in(1);
441 uint op = in1->Opcode();
442 const TypeInt* t2 = phase->type(in(2))->isa_int();
443 if (t2 && t2->is_con()) {
444 int con = t2->get_con();
445 // Masking off high bits which are always zero is useless.
446 const TypeInt* t1 = phase->type( in(1) )->isa_int();
447 if (t1 != NULL && t1->_lo >= 0) {
448 jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi));
449 if ((t1_support & con) == t1_support)
450 return in1;
451 }
452 // Masking off the high bits of a unsigned-shift-right is not
453 // needed either.
454 if (op == Op_URShiftI) {
455 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
456 if (t12 && t12->is_con()) { // Shift is by a constant
457 int shift = t12->get_con();
458 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
459 int mask = max_juint >> shift;
460 if ((mask & con) == mask) // If AND is useless, skip it
461 return in1;
462 }
463 }
464 }
465 return MulNode::Identity(phase);
466 }
467
468 //------------------------------Ideal------------------------------------------
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182 } else if ((con = in(2)->find_int_con(0)) == 0) {
183 return MulNode::Ideal(phase, can_reshape);
184 }
185
186 // Now we have a constant Node on the right and the constant in con
187 if (con == 0) return NULL; // By zero is handled by Value call
188 if (con == 1) return NULL; // By one is handled by Identity call
189
190 // Check for negative constant; if so negate the final result
191 bool sign_flip = false;
192
193 unsigned int abs_con = uabs(con);
194 if (abs_con != (unsigned int)con) {
195 sign_flip = true;
196 }
197
198 // Get low bit; check for being the only bit
199 Node *res = NULL;
200 unsigned int bit1 = abs_con & (0-abs_con); // Extract low bit
201 if (bit1 == abs_con) { // Found a power of 2?
202 res = new LShiftINode(in(1), phase->intcon(log2_uint(bit1)));
203 } else {
204
205 // Check for constant with 2 bits set
206 unsigned int bit2 = abs_con-bit1;
207 bit2 = bit2 & (0-bit2); // Extract 2nd bit
208 if (bit2 + bit1 == abs_con) { // Found all bits in con?
209 Node *n1 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_uint(bit1))));
210 Node *n2 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_uint(bit2))));
211 res = new AddINode(n2, n1);
212
213 } else if (is_power_of_2(abs_con+1)) {
214 // Sleezy: power-of-2 -1. Next time be generic.
215 unsigned int temp = abs_con + 1;
216 Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2_uint(temp))));
217 res = new SubINode(n1, in(1));
218 } else {
219 return MulNode::Ideal(phase, can_reshape);
220 }
221 }
222
223 if (sign_flip) { // Need to negate result?
224 res = phase->transform(res);// Transform, before making the zero con
225 res = new SubINode(phase->intcon(0),res);
226 }
227
228 return res; // Return final result
229 }
230
231 //------------------------------mul_ring---------------------------------------
232 // Compute the product type of two integer ranges into this node.
233 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
234 const TypeInt *r0 = t0->is_int(); // Handy access
235 const TypeInt *r1 = t1->is_int();
236
428 }
429
430 return TypeInt::INT; // No constants to be had
431 }
432
433 //------------------------------Identity---------------------------------------
434 // Masking off the high bits of an unsigned load is not required
435 Node* AndINode::Identity(PhaseGVN* phase) {
436
437 // x & x => x
438 if (phase->eqv(in(1), in(2))) return in(1);
439
440 Node* in1 = in(1);
441 uint op = in1->Opcode();
442 const TypeInt* t2 = phase->type(in(2))->isa_int();
443 if (t2 && t2->is_con()) {
444 int con = t2->get_con();
445 // Masking off high bits which are always zero is useless.
446 const TypeInt* t1 = phase->type( in(1) )->isa_int();
447 if (t1 != NULL && t1->_lo >= 0) {
448 jint t1_support = right_n_bits(1 + log2_jint(t1->_hi));
449 if ((t1_support & con) == t1_support)
450 return in1;
451 }
452 // Masking off the high bits of a unsigned-shift-right is not
453 // needed either.
454 if (op == Op_URShiftI) {
455 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
456 if (t12 && t12->is_con()) { // Shift is by a constant
457 int shift = t12->get_con();
458 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
459 int mask = max_juint >> shift;
460 if ((mask & con) == mask) // If AND is useless, skip it
461 return in1;
462 }
463 }
464 }
465 return MulNode::Identity(phase);
466 }
467
468 //------------------------------Ideal------------------------------------------
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