1188 void fxrstor(Address src);
1189 void xrstor(Address src);
1190
1191 void fxsave(Address dst);
1192 void xsave(Address dst);
1193
1194 void fyl2x();
1195 void frndint();
1196 void f2xm1();
1197 void fldl2e();
1198
1199 void hlt();
1200
1201 void idivl(Register src);
1202 void divl(Register src); // Unsigned division
1203
1204 #ifdef _LP64
1205 void idivq(Register src);
1206 #endif
1207
1208 void imull(Register dst, Register src);
1209 void imull(Register dst, Register src, int value);
1210 void imull(Register dst, Address src);
1211
1212 #ifdef _LP64
1213 void imulq(Register dst, Register src);
1214 void imulq(Register dst, Register src, int value);
1215 void imulq(Register dst, Address src);
1216 #endif
1217
1218 // jcc is the generic conditional branch generator to run-
1219 // time routines, jcc is used for branches to labels. jcc
1220 // takes a branch opcode (cc) and a label (L) and generates
1221 // either a backward branch or a forward branch and links it
1222 // to the label fixup chain. Usage:
1223 //
1224 // Label L; // unbound label
1225 // jcc(cc, L); // forward branch to unbound label
1226 // bind(L); // bind label to the current pc
1227 // jcc(cc, L); // backward branch to bound label
1710
1711 void subq(Address dst, int32_t imm32);
1712 void subq(Address dst, Register src);
1713 void subq(Register dst, int32_t imm32);
1714 void subq(Register dst, Address src);
1715 void subq(Register dst, Register src);
1716
1717 // Force generation of a 4 byte immediate value even if it fits into 8bit
1718 void subl_imm32(Register dst, int32_t imm32);
1719 void subq_imm32(Register dst, int32_t imm32);
1720
1721 // Subtract Scalar Double-Precision Floating-Point Values
1722 void subsd(XMMRegister dst, Address src);
1723 void subsd(XMMRegister dst, XMMRegister src);
1724
1725 // Subtract Scalar Single-Precision Floating-Point Values
1726 void subss(XMMRegister dst, Address src);
1727 void subss(XMMRegister dst, XMMRegister src);
1728
1729 void testb(Register dst, int imm8);
1730
1731 void testl(Register dst, int32_t imm32);
1732 void testl(Register dst, Register src);
1733 void testl(Register dst, Address src);
1734
1735 void testq(Register dst, int32_t imm32);
1736 void testq(Register dst, Register src);
1737
1738 // BMI - count trailing zeros
1739 void tzcntl(Register dst, Register src);
1740 void tzcntq(Register dst, Register src);
1741
1742 // Unordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
1743 void ucomisd(XMMRegister dst, Address src);
1744 void ucomisd(XMMRegister dst, XMMRegister src);
1745
1746 // Unordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
1747 void ucomiss(XMMRegister dst, Address src);
1748 void ucomiss(XMMRegister dst, XMMRegister src);
1749
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1188 void fxrstor(Address src);
1189 void xrstor(Address src);
1190
1191 void fxsave(Address dst);
1192 void xsave(Address dst);
1193
1194 void fyl2x();
1195 void frndint();
1196 void f2xm1();
1197 void fldl2e();
1198
1199 void hlt();
1200
1201 void idivl(Register src);
1202 void divl(Register src); // Unsigned division
1203
1204 #ifdef _LP64
1205 void idivq(Register src);
1206 #endif
1207
1208 void imull(Register src);
1209 void imull(Register dst, Register src);
1210 void imull(Register dst, Register src, int value);
1211 void imull(Register dst, Address src);
1212
1213 #ifdef _LP64
1214 void imulq(Register dst, Register src);
1215 void imulq(Register dst, Register src, int value);
1216 void imulq(Register dst, Address src);
1217 #endif
1218
1219 // jcc is the generic conditional branch generator to run-
1220 // time routines, jcc is used for branches to labels. jcc
1221 // takes a branch opcode (cc) and a label (L) and generates
1222 // either a backward branch or a forward branch and links it
1223 // to the label fixup chain. Usage:
1224 //
1225 // Label L; // unbound label
1226 // jcc(cc, L); // forward branch to unbound label
1227 // bind(L); // bind label to the current pc
1228 // jcc(cc, L); // backward branch to bound label
1711
1712 void subq(Address dst, int32_t imm32);
1713 void subq(Address dst, Register src);
1714 void subq(Register dst, int32_t imm32);
1715 void subq(Register dst, Address src);
1716 void subq(Register dst, Register src);
1717
1718 // Force generation of a 4 byte immediate value even if it fits into 8bit
1719 void subl_imm32(Register dst, int32_t imm32);
1720 void subq_imm32(Register dst, int32_t imm32);
1721
1722 // Subtract Scalar Double-Precision Floating-Point Values
1723 void subsd(XMMRegister dst, Address src);
1724 void subsd(XMMRegister dst, XMMRegister src);
1725
1726 // Subtract Scalar Single-Precision Floating-Point Values
1727 void subss(XMMRegister dst, Address src);
1728 void subss(XMMRegister dst, XMMRegister src);
1729
1730 void testb(Register dst, int imm8);
1731 void testb(Address dst, int imm8);
1732
1733 void testl(Register dst, int32_t imm32);
1734 void testl(Register dst, Register src);
1735 void testl(Register dst, Address src);
1736
1737 void testq(Register dst, int32_t imm32);
1738 void testq(Register dst, Register src);
1739
1740 // BMI - count trailing zeros
1741 void tzcntl(Register dst, Register src);
1742 void tzcntq(Register dst, Register src);
1743
1744 // Unordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
1745 void ucomisd(XMMRegister dst, Address src);
1746 void ucomisd(XMMRegister dst, XMMRegister src);
1747
1748 // Unordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
1749 void ucomiss(XMMRegister dst, Address src);
1750 void ucomiss(XMMRegister dst, XMMRegister src);
1751
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