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src/cpu/x86/vm/x86_64.ad

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9880 // Compare into -1,0,1
9881 instruct cmpD_imm(rRegI dst, regD src, immD con, rFlagsReg cr) %{
9882   match(Set dst (CmpD3 src con));
9883   effect(KILL cr);
9884 
9885   ins_cost(275);
9886   format %{ "ucomisd $src, [$constantaddress]\t# load from constant table: double=$con\n\t"
9887             "movl    $dst, #-1\n\t"
9888             "jp,s    done\n\t"
9889             "jb,s    done\n\t"
9890             "setne   $dst\n\t"
9891             "movzbl  $dst, $dst\n"
9892     "done:" %}
9893   ins_encode %{
9894     __ ucomisd($src$$XMMRegister, $constantaddress($con));
9895     emit_cmpfp3(_masm, $dst$$Register);
9896   %}
9897   ins_pipe(pipe_slow);
9898 %}
9899 
9900 // -----------Trig and Trancendental Instructions------------------------------
9901 instruct tanD_reg(regD dst) %{
9902   match(Set dst (TanD dst));
9903 
9904   format %{ "dtan   $dst\n\t" %}
9905   ins_encode( Push_SrcXD(dst),
9906               Opcode(0xD9), Opcode(0xF2),   //fptan
9907               Opcode(0xDD), Opcode(0xD8),   //fstp st
9908               Push_ResultXD(dst) );
9909   ins_pipe( pipe_slow );
9910 %}
9911 
9912 instruct log10D_reg(regD dst) %{
9913   // The source and result Double operands in XMM registers
9914   match(Set dst (Log10D dst));
9915   // fldlg2       ; push log_10(2) on the FPU stack; full 80-bit number
9916   // fyl2x        ; compute log_10(2) * log_2(x)
9917   format %{ "fldlg2\t\t\t#Log10\n\t"
9918             "fyl2x\t\t\t# Q=Log10*Log_2(x)\n\t"
9919          %}
9920    ins_encode(Opcode(0xD9), Opcode(0xEC),   // fldlg2
9921               Push_SrcXD(dst),
9922               Opcode(0xD9), Opcode(0xF1),   // fyl2x
9923               Push_ResultXD(dst));
9924 
9925   ins_pipe( pipe_slow );
9926 %}
9927 
9928 //----------Arithmetic Conversion Instructions---------------------------------
9929 
9930 instruct roundFloat_nop(regF dst)
9931 %{
9932   match(Set dst (RoundFloat dst));
9933 
9934   ins_cost(0);
9935   ins_encode();
9936   ins_pipe(empty);
9937 %}
9938 
9939 instruct roundDouble_nop(regD dst)
9940 %{
9941   match(Set dst (RoundDouble dst));
9942 
9943   ins_cost(0);
9944   ins_encode();
9945   ins_pipe(empty);
9946 %}
9947 




9880 // Compare into -1,0,1
9881 instruct cmpD_imm(rRegI dst, regD src, immD con, rFlagsReg cr) %{
9882   match(Set dst (CmpD3 src con));
9883   effect(KILL cr);
9884 
9885   ins_cost(275);
9886   format %{ "ucomisd $src, [$constantaddress]\t# load from constant table: double=$con\n\t"
9887             "movl    $dst, #-1\n\t"
9888             "jp,s    done\n\t"
9889             "jb,s    done\n\t"
9890             "setne   $dst\n\t"
9891             "movzbl  $dst, $dst\n"
9892     "done:" %}
9893   ins_encode %{
9894     __ ucomisd($src$$XMMRegister, $constantaddress($con));
9895     emit_cmpfp3(_masm, $dst$$Register);
9896   %}
9897   ins_pipe(pipe_slow);
9898 %}
9899 




























9900 //----------Arithmetic Conversion Instructions---------------------------------
9901 
9902 instruct roundFloat_nop(regF dst)
9903 %{
9904   match(Set dst (RoundFloat dst));
9905 
9906   ins_cost(0);
9907   ins_encode();
9908   ins_pipe(empty);
9909 %}
9910 
9911 instruct roundDouble_nop(regD dst)
9912 %{
9913   match(Set dst (RoundDouble dst));
9914 
9915   ins_cost(0);
9916   ins_encode();
9917   ins_pipe(empty);
9918 %}
9919 


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