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src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

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rev 48394 : [RFC] MachSpillCopy peephole
Enable OptoPeephole by default on AArch64.
Add manually defined peephole() method for MachSpillCopy node.


1281 
1282 private:
1283   // Return the effective address r + (r1 << ext) + offset.
1284   // Uses rscratch2.
1285   Address offsetted_address(Register r, Register r1, Address::extend ext,
1286                             int offset, int size);
1287 
1288 private:
1289   // Returns an address on the stack which is reachable with a ldr/str of size
1290   // Uses rscratch2 if the address is not directly reachable
1291   Address spill_address(int size, int offset, Register tmp=rscratch2);
1292 
1293 public:
1294   void spill(Register Rx, bool is64, int offset) {
1295     if (is64) {
1296       str(Rx, spill_address(8, offset));
1297     } else {
1298       strw(Rx, spill_address(4, offset));
1299     }
1300   }

















1301   void spill(FloatRegister Vx, SIMD_RegVariant T, int offset) {
1302     str(Vx, T, spill_address(1 << (int)T, offset));
1303   }
1304   void unspill(Register Rx, bool is64, int offset) {
1305     if (is64) {
1306       ldr(Rx, spill_address(8, offset));
1307     } else {
1308       ldrw(Rx, spill_address(4, offset));

















1309     }
1310   }
1311   void unspill(FloatRegister Vx, SIMD_RegVariant T, int offset) {
1312     ldr(Vx, T, spill_address(1 << (int)T, offset));
1313   }
1314   void spill_copy128(int src_offset, int dst_offset,
1315                      Register tmp1=rscratch1, Register tmp2=rscratch2) {
1316     if (src_offset < 512 && (src_offset & 7) == 0 &&
1317         dst_offset < 512 && (dst_offset & 7) == 0) {
1318       ldp(tmp1, tmp2, Address(sp, src_offset));
1319       stp(tmp1, tmp2, Address(sp, dst_offset));
1320     } else {
1321       unspill(tmp1, true, src_offset);
1322       spill(tmp1, true, dst_offset);
1323       unspill(tmp1, true, src_offset+8);
1324       spill(tmp1, true, dst_offset+8);
1325     }
1326   }
1327 };
1328 




1281 
1282 private:
1283   // Return the effective address r + (r1 << ext) + offset.
1284   // Uses rscratch2.
1285   Address offsetted_address(Register r, Register r1, Address::extend ext,
1286                             int offset, int size);
1287 
1288 private:
1289   // Returns an address on the stack which is reachable with a ldr/str of size
1290   // Uses rscratch2 if the address is not directly reachable
1291   Address spill_address(int size, int offset, Register tmp=rscratch2);
1292 
1293 public:
1294   void spill(Register Rx, bool is64, int offset) {
1295     if (is64) {
1296       str(Rx, spill_address(8, offset));
1297     } else {
1298       strw(Rx, spill_address(4, offset));
1299     }
1300   }
1301   void spill(Register Rx, Register Ry,bool is64, int offset) {
1302     if (is64) {
1303       if (offset <= 504) {
1304         stp(Rx, Ry, spill_address(8, offset));
1305       } else {
1306         str(Rx, spill_address(8, offset));
1307         str(Ry, spill_address(8, offset+8));
1308       }
1309     } else {
1310       if (offset <= 252) {
1311         stpw(Rx, Ry, spill_address(4, offset));
1312       } else {
1313         strw(Rx, spill_address(4, offset));
1314         strw(Ry, spill_address(4, offset+4));
1315       }
1316     }
1317   }
1318   void spill(FloatRegister Vx, SIMD_RegVariant T, int offset) {
1319     str(Vx, T, spill_address(1 << (int)T, offset));
1320   }
1321   void unspill(Register Rx, bool is64, int offset) {
1322     if (is64) {
1323       ldr(Rx, spill_address(8, offset));
1324     } else {
1325       ldrw(Rx, spill_address(4, offset));
1326     }
1327   }
1328   void unspill(Register Rx, Register Ry, bool is64, int offset) {
1329     if (is64) {
1330       if (offset <= 504) {
1331         ldp(Rx, Ry, spill_address(8, offset));
1332       } else {
1333         ldr(Rx, spill_address(8, offset));
1334         ldr(Ry, spill_address(8, offset+8));
1335       }
1336     } else {
1337       if (offset <= 252) {
1338         ldpw(Rx, Ry, spill_address(4, offset));
1339       } else {
1340         ldrw(Rx, spill_address(4, offset));
1341         ldrw(Ry, spill_address(4, offset+4));
1342       }
1343     }
1344   }
1345   void unspill(FloatRegister Vx, SIMD_RegVariant T, int offset) {
1346     ldr(Vx, T, spill_address(1 << (int)T, offset));
1347   }
1348   void spill_copy128(int src_offset, int dst_offset,
1349                      Register tmp1=rscratch1, Register tmp2=rscratch2) {
1350     if (src_offset < 512 && (src_offset & 7) == 0 &&
1351         dst_offset < 512 && (dst_offset & 7) == 0) {
1352       ldp(tmp1, tmp2, Address(sp, src_offset));
1353       stp(tmp1, tmp2, Address(sp, dst_offset));
1354     } else {
1355       unspill(tmp1, true, src_offset);
1356       spill(tmp1, true, dst_offset);
1357       unspill(tmp1, true, src_offset+8);
1358       spill(tmp1, true, dst_offset+8);
1359     }
1360   }
1361 };
1362 


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