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src/hotspot/share/opto/regmask.cpp

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  1 /*
  2  * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "opto/ad.hpp"

 27 #include "opto/compile.hpp"
 28 #include "opto/matcher.hpp"
 29 #include "opto/node.hpp"
 30 #include "opto/regmask.hpp"
 31 #include "utilities/population_count.hpp"
 32 #include "utilities/powerOfTwo.hpp"
 33 
 34 #define RM_SIZE _RM_SIZE /* a constant private to the class RegMask */
 35 
 36 //------------------------------dump-------------------------------------------
 37 
 38 #ifndef PRODUCT
 39 void OptoReg::dump(int r, outputStream *st) {
 40   switch (r) {
 41   case Special: st->print("r---"); break;
 42   case Bad:     st->print("rBAD"); break;
 43   default:
 44     if (r < _last_Mach_Reg) st->print("%s", Matcher::regName[r]);
 45     else st->print("rS%d",r);
 46     break;
 47   }
 48 }
 49 #endif
 50 
 51 
 52 //=============================================================================
 53 const RegMask RegMask::Empty(
 54 # define BODY(I) 0,
 55   FORALL_BODY
 56 # undef BODY
 57   0
 58 );
 59 
 60 //=============================================================================
 61 bool RegMask::is_vector(uint ireg) {
 62   return (ireg == Op_VecS || ireg == Op_VecD ||
 63           ireg == Op_VecX || ireg == Op_VecY || ireg == Op_VecZ );
 64 }
 65 
 66 int RegMask::num_registers(uint ireg) {
 67     switch(ireg) {
 68       case Op_VecZ:
 69         return 16;
 70       case Op_VecY:
 71         return 8;
 72       case Op_VecX:
 73         return 4;
 74       case Op_VecD:

 75       case Op_RegD:
 76       case Op_RegL:
 77 #ifdef _LP64
 78       case Op_RegP:
 79 #endif
 80         return 2;



 81     }
 82     // Op_VecS and the rest ideal registers.
 83     return 1;
 84 }
 85 













 86 // Clear out partial bits; leave only bit pairs
 87 void RegMask::clear_to_pairs() {
 88   assert(valid_watermarks(), "sanity");
 89   for (int i = _lwm; i <= _hwm; i++) {
 90     int bits = _A[i];
 91     bits &= ((bits & 0x55555555)<<1); // 1 hi-bit set for each pair
 92     bits |= (bits>>1);          // Smear 1 hi-bit into a pair
 93     _A[i] = bits;
 94   }
 95   assert(is_aligned_pairs(), "mask is not aligned, adjacent pairs");
 96 }
 97 
 98 bool RegMask::is_misaligned_pair() const {
 99   return Size() == 2 && !is_aligned_pairs();
100 }
101 
102 bool RegMask::is_aligned_pairs() const {
103   // Assert that the register mask contains only bit pairs.
104   assert(valid_watermarks(), "sanity");
105   for (int i = _lwm; i <= _hwm; i++) {

140         i++;                       // Skip iteration forward
141         if (i > _hwm || _A[i] != 1)
142           return false; // Require 1 lo bit in next word
143       }
144     }
145   }
146   // True for both the empty mask and for a bit pair
147   return true;
148 }
149 
150 // Test for a single adjacent set of ideal register's size.
151 bool RegMask::is_bound(uint ireg) const {
152   if (is_vector(ireg)) {
153     if (is_bound_set(num_registers(ireg)))
154       return true;
155   } else if (is_bound1() || is_bound_pair()) {
156     return true;
157   }
158   return false;
159 }










160 
161 // only indicies of power 2 are accessed, so index 3 is only filled in for storage.
162 static int low_bits[5] = { 0x55555555, 0x11111111, 0x01010101, 0x00000000, 0x00010001 };
163 
164 // Find the lowest-numbered register set in the mask.  Return the
165 // HIGHEST register number in the set, or BAD if no sets.
166 // Works also for size 1.
167 OptoReg::Name RegMask::find_first_set(const int size) const {
168   assert(is_aligned_sets(size), "mask is not aligned, adjacent sets");





169   assert(valid_watermarks(), "sanity");
170   for (int i = _lwm; i <= _hwm; i++) {
171     if (_A[i]) {                // Found some bits
172       // Convert to bit number, return hi bit in pair
173       return OptoReg::Name((i<<_LogWordBits) + find_lowest_bit(_A[i]) + (size - 1));
174     }
175   }
176   return OptoReg::Bad;
177 }
178 
179 // Clear out partial bits; leave only aligned adjacent bit pairs
180 void RegMask::clear_to_sets(const int size) {
181   if (size == 1) return;
182   assert(2 <= size && size <= 16, "update low bits table");
183   assert(is_power_of_2(size), "sanity");
184   assert(valid_watermarks(), "sanity");
185   int low_bits_mask = low_bits[size>>2];
186   for (int i = _lwm; i <= _hwm; i++) {
187     int bits = _A[i];
188     int sets = (bits & low_bits_mask);

228         }
229       }
230     }
231     _A[i] = sets;
232   }
233   assert(is_aligned_sets(size), "mask is not aligned, adjacent sets");
234 }
235 
236 // Assert that the register mask contains only bit sets.
237 bool RegMask::is_aligned_sets(const int size) const {
238   if (size == 1) return true;
239   assert(2 <= size && size <= 16, "update low bits table");
240   assert(is_power_of_2(size), "sanity");
241   int low_bits_mask = low_bits[size>>2];
242   assert(valid_watermarks(), "sanity");
243   for (int i = _lwm; i <= _hwm; i++) {
244     int bits = _A[i];
245     while (bits) {              // Check bits for pairing
246       int bit = bits & -bits;   // Extract low bit
247       // Low bit is not odd means its mis-aligned.
248       if ((bit & low_bits_mask) == 0) return false;


249       // Do extra work since (bit << size) may overflow.
250       int hi_bit = bit << (size-1); // high bit
251       int set = hi_bit + ((hi_bit-1) & ~(bit-1));
252       // Check for aligned adjacent bits in this set
253       if ((bits & set) != set) return false;


254       bits -= set;  // Remove this set
255     }
256   }
257   return true;
258 }
259 
260 // Return TRUE if the mask contains one adjacent set of bits and no other bits.
261 // Works also for size 1.
262 int RegMask::is_bound_set(const int size) const {
263   if (is_AllStack()) return false;
264   assert(1 <= size && size <= 16, "update low bits table");
265   assert(valid_watermarks(), "sanity");
266   int bit = -1;                 // Set to hold the one bit allowed
267   for (int i = _lwm; i <= _hwm; i++) {
268     if (_A[i] ) {               // Found some bits
269       if (bit != -1)
270        return false;            // Already had bits, so fail
271       bit = _A[i] & -_A[i];     // Extract low bit from mask
272       int hi_bit = bit << (size-1); // high bit
273       if (hi_bit != 0) {        // Bit set stays in same word?

  1 /*
  2  * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "opto/ad.hpp"
 27 #include "opto/chaitin.hpp"
 28 #include "opto/compile.hpp"
 29 #include "opto/matcher.hpp"
 30 #include "opto/node.hpp"
 31 #include "opto/regmask.hpp"
 32 #include "utilities/population_count.hpp"
 33 #include "utilities/powerOfTwo.hpp"
 34 
 35 #define RM_SIZE _RM_SIZE /* a constant private to the class RegMask */
 36 
 37 //------------------------------dump-------------------------------------------
 38 
 39 #ifndef PRODUCT
 40 void OptoReg::dump(int r, outputStream *st) {
 41   switch (r) {
 42   case Special: st->print("r---"); break;
 43   case Bad:     st->print("rBAD"); break;
 44   default:
 45     if (r < _last_Mach_Reg) st->print("%s", Matcher::regName[r]);
 46     else st->print("rS%d",r);
 47     break;
 48   }
 49 }
 50 #endif
 51 
 52 
 53 //=============================================================================
 54 const RegMask RegMask::Empty(
 55 # define BODY(I) 0,
 56   FORALL_BODY
 57 # undef BODY
 58   0
 59 );
 60 
 61 //=============================================================================
 62 bool RegMask::is_vector(uint ireg) {
 63   return (ireg == Op_VecA || ireg == Op_VecS || ireg == Op_VecD ||
 64           ireg == Op_VecX || ireg == Op_VecY || ireg == Op_VecZ );
 65 }
 66 
 67 int RegMask::num_registers(uint ireg) {
 68     switch(ireg) {
 69       case Op_VecZ:
 70         return SlotsPerVecZ;
 71       case Op_VecY:
 72         return SlotsPerVecY;
 73       case Op_VecX:
 74         return SlotsPerVecX;
 75       case Op_VecD:
 76         return SlotsPerVecD;
 77       case Op_RegD:
 78       case Op_RegL:
 79 #ifdef _LP64
 80       case Op_RegP:
 81 #endif
 82         return 2;
 83       case Op_VecA:
 84         assert(Matcher::supports_scalable_vector(), "does not support scalable vector");
 85         return SlotsPerVecA;
 86     }
 87     // Op_VecS and the rest ideal registers.
 88     return 1;
 89 }
 90 
 91 int RegMask::num_registers(uint ireg, LRG &lrg) {
 92   int n_regs = num_registers(ireg);
 93 
 94   // assigned is OptoReg which is selected by register allocator
 95   OptoReg::Name assigned = lrg.reg();
 96   assert(OptoReg::is_valid(assigned), "should be valid opto register");
 97 
 98   if (lrg.is_scalable() && OptoReg::is_stack(assigned)) {
 99     n_regs = lrg.scalable_reg_slots();
100   }
101   return n_regs;
102 }
103 
104 // Clear out partial bits; leave only bit pairs
105 void RegMask::clear_to_pairs() {
106   assert(valid_watermarks(), "sanity");
107   for (int i = _lwm; i <= _hwm; i++) {
108     int bits = _A[i];
109     bits &= ((bits & 0x55555555)<<1); // 1 hi-bit set for each pair
110     bits |= (bits>>1);          // Smear 1 hi-bit into a pair
111     _A[i] = bits;
112   }
113   assert(is_aligned_pairs(), "mask is not aligned, adjacent pairs");
114 }
115 
116 bool RegMask::is_misaligned_pair() const {
117   return Size() == 2 && !is_aligned_pairs();
118 }
119 
120 bool RegMask::is_aligned_pairs() const {
121   // Assert that the register mask contains only bit pairs.
122   assert(valid_watermarks(), "sanity");
123   for (int i = _lwm; i <= _hwm; i++) {

158         i++;                       // Skip iteration forward
159         if (i > _hwm || _A[i] != 1)
160           return false; // Require 1 lo bit in next word
161       }
162     }
163   }
164   // True for both the empty mask and for a bit pair
165   return true;
166 }
167 
168 // Test for a single adjacent set of ideal register's size.
169 bool RegMask::is_bound(uint ireg) const {
170   if (is_vector(ireg)) {
171     if (is_bound_set(num_registers(ireg)))
172       return true;
173   } else if (is_bound1() || is_bound_pair()) {
174     return true;
175   }
176   return false;
177 }
178 // Check that whether given reg number with size is valid
179 // for current regmask, where reg is the highest number.
180 bool RegMask::is_valid_reg(OptoReg::Name reg, const int size) const {
181   for (int i = 0; i < size; i++) {
182     if (!Member(reg - i)) {
183       return false;
184     }
185   }
186   return true;
187 }
188 
189 // only indicies of power 2 are accessed, so index 3 is only filled in for storage.
190 static int low_bits[5] = { 0x55555555, 0x11111111, 0x01010101, 0x00000000, 0x00010001 };
191 
192 // Find the lowest-numbered register set in the mask.  Return the
193 // HIGHEST register number in the set, or BAD if no sets.
194 // Works also for size 1.
195 OptoReg::Name RegMask::find_first_set(LRG &lrg, const int size) const {
196   if (lrg.is_scalable()) {
197     // For scalable vector register, regmask is SlotsPerVecA bits aligned.
198     assert(is_aligned_sets(SlotsPerVecA), "mask is not aligned, adjacent sets");
199   } else {
200     assert(is_aligned_sets(size), "mask is not aligned, adjacent sets");
201   }
202   assert(valid_watermarks(), "sanity");
203   for (int i = _lwm; i <= _hwm; i++) {
204     if (_A[i]) {                // Found some bits
205       // Convert to bit number, return hi bit in pair
206       return OptoReg::Name((i<<_LogWordBits) + find_lowest_bit(_A[i]) + (size - 1));
207     }
208   }
209   return OptoReg::Bad;
210 }
211 
212 // Clear out partial bits; leave only aligned adjacent bit pairs
213 void RegMask::clear_to_sets(const int size) {
214   if (size == 1) return;
215   assert(2 <= size && size <= 16, "update low bits table");
216   assert(is_power_of_2(size), "sanity");
217   assert(valid_watermarks(), "sanity");
218   int low_bits_mask = low_bits[size>>2];
219   for (int i = _lwm; i <= _hwm; i++) {
220     int bits = _A[i];
221     int sets = (bits & low_bits_mask);

261         }
262       }
263     }
264     _A[i] = sets;
265   }
266   assert(is_aligned_sets(size), "mask is not aligned, adjacent sets");
267 }
268 
269 // Assert that the register mask contains only bit sets.
270 bool RegMask::is_aligned_sets(const int size) const {
271   if (size == 1) return true;
272   assert(2 <= size && size <= 16, "update low bits table");
273   assert(is_power_of_2(size), "sanity");
274   int low_bits_mask = low_bits[size>>2];
275   assert(valid_watermarks(), "sanity");
276   for (int i = _lwm; i <= _hwm; i++) {
277     int bits = _A[i];
278     while (bits) {              // Check bits for pairing
279       int bit = bits & -bits;   // Extract low bit
280       // Low bit is not odd means its mis-aligned.
281       if ((bit & low_bits_mask) == 0) {
282         return false;
283       }
284       // Do extra work since (bit << size) may overflow.
285       int hi_bit = bit << (size-1); // high bit
286       int set = hi_bit + ((hi_bit-1) & ~(bit-1));
287       // Check for aligned adjacent bits in this set
288       if ((bits & set) != set) {
289         return false;
290       }
291       bits -= set;  // Remove this set
292     }
293   }
294   return true;
295 }
296 
297 // Return TRUE if the mask contains one adjacent set of bits and no other bits.
298 // Works also for size 1.
299 int RegMask::is_bound_set(const int size) const {
300   if (is_AllStack()) return false;
301   assert(1 <= size && size <= 16, "update low bits table");
302   assert(valid_watermarks(), "sanity");
303   int bit = -1;                 // Set to hold the one bit allowed
304   for (int i = _lwm; i <= _hwm; i++) {
305     if (_A[i] ) {               // Found some bits
306       if (bit != -1)
307        return false;            // Already had bits, so fail
308       bit = _A[i] & -_A[i];     // Extract low bit from mask
309       int hi_bit = bit << (size-1); // high bit
310       if (hi_bit != 0) {        // Bit set stays in same word?
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