275 }
276 // Check for mismatch inputs to Phi
277 for (uint j = 1; j < cnt; j++) {
278 Node *m = n->in(j);
279 uint src_name = _phc._lrg_map.find(m);
280 if (src_name != phi_name) {
281 Block *pred = _phc._cfg.get_block_for_node(b->pred(j));
282 Node *copy;
283 assert(!m->is_Con() || m->is_Mach(), "all Con must be Mach");
284 // Rematerialize constants instead of copying them.
285 // We do this only for immediate constants, we avoid constant table loads
286 // because that will unsafely extend the live range of the constant table base.
287 if (m->is_Mach() && m->as_Mach()->is_Con() && !m->as_Mach()->is_MachConstant() &&
288 m->as_Mach()->rematerialize()) {
289 copy = m->clone();
290 // Insert the copy in the predecessor basic block
291 pred->add_inst(copy);
292 // Copy any flags as well
293 _phc.clone_projs(pred, pred->end_idx(), m, copy, _phc._lrg_map);
294 } else {
295 const RegMask *rm = C->matcher()->idealreg2spillmask[m->ideal_reg()];
296 copy = new MachSpillCopyNode(MachSpillCopyNode::PhiInput, m, *rm, *rm);
297 // Find a good place to insert. Kinda tricky, use a subroutine
298 insert_copy_with_overlap(pred,copy,phi_name,src_name);
299 }
300 // Insert the copy in the use-def chain
301 n->set_req(j, copy);
302 _phc._cfg.map_node_to_block(copy, pred);
303 // Extend ("register allocate") the names array for the copy.
304 _phc._lrg_map.extend(copy->_idx, phi_name);
305 } // End of if Phi names do not match
306 } // End of for all inputs to Phi
307 } else { // End of if Phi
308
309 // Now check for 2-address instructions
310 uint idx;
311 if( n->is_Mach() && (idx=n->as_Mach()->two_adr()) ) {
312 // Get the chosen name for the Node
313 uint name = _phc._lrg_map.find(n);
314 assert (name, "no 2-address specials");
315 // Check for name mis-match on the 2-address input
316 Node *m = n->in(idx);
317 if (_phc._lrg_map.find(m) != name) {
318 Node *copy;
319 assert(!m->is_Con() || m->is_Mach(), "all Con must be Mach");
320 // At this point it is unsafe to extend live ranges (6550579).
321 // Rematerialize only constants as we do for Phi above.
322 if (m->is_Mach() && m->as_Mach()->is_Con() && !m->as_Mach()->is_MachConstant() &&
323 m->as_Mach()->rematerialize()) {
324 copy = m->clone();
325 // Insert the copy in the basic block, just before us
326 b->insert_node(copy, l++);
327 l += _phc.clone_projs(b, l, m, copy, _phc._lrg_map);
328 } else {
329 const RegMask *rm = C->matcher()->idealreg2spillmask[m->ideal_reg()];
330 copy = new MachSpillCopyNode(MachSpillCopyNode::TwoAddress, m, *rm, *rm);
331 // Insert the copy in the basic block, just before us
332 b->insert_node(copy, l++);
333 }
334 // Insert the copy in the use-def chain
335 n->set_req(idx, copy);
336 // Extend ("register allocate") the names array for the copy.
337 _phc._lrg_map.extend(copy->_idx, name);
338 _phc._cfg.map_node_to_block(copy, b);
339 }
340
341 } // End of is two-adr
342
343 // Insert a copy at a debug use for a lrg which has high frequency
344 if (b->_freq < OPTO_DEBUG_SPLIT_FREQ || _phc._cfg.is_uncommon(b)) {
345 // Walk the debug inputs to the node and check for lrg freq
346 JVMState* jvms = n->jvms();
347 uint debug_start = jvms ? jvms->debug_start() : 999999;
348 uint debug_end = jvms ? jvms->debug_end() : 999999;
349 for(uint inpidx = debug_start; inpidx < debug_end; inpidx++) {
356 uint nidx = _phc._lrg_map.live_range_id(inp);
357 LRG &lrg = lrgs(nidx);
358
359 // If this lrg has a high frequency use/def
360 if( lrg._maxfreq >= _phc.high_frequency_lrg() ) {
361 // If the live range is also live out of this block (like it
362 // would be for a fast/slow idiom), the normal spill mechanism
363 // does an excellent job. If it is not live out of this block
364 // (like it would be for debug info to uncommon trap) splitting
365 // the live range now allows a better allocation in the high
366 // frequency blocks.
367 // Build_IFG_virtual has converted the live sets to
368 // live-IN info, not live-OUT info.
369 uint k;
370 for( k=0; k < b->_num_succs; k++ )
371 if( _phc._live->live(b->_succs[k])->member( nidx ) )
372 break; // Live in to some successor block?
373 if( k < b->_num_succs )
374 continue; // Live out; do not pre-split
375 // Split the lrg at this use
376 const RegMask *rm = C->matcher()->idealreg2spillmask[inp->ideal_reg()];
377 Node* copy = new MachSpillCopyNode(MachSpillCopyNode::DebugUse, inp, *rm, *rm);
378 // Insert the copy in the use-def chain
379 n->set_req(inpidx, copy );
380 // Insert the copy in the basic block, just before us
381 b->insert_node(copy, l++);
382 // Extend ("register allocate") the names array for the copy.
383 uint max_lrg_id = _phc._lrg_map.max_lrg_id();
384 _phc.new_lrg(copy, max_lrg_id);
385 _phc._lrg_map.set_max_lrg_id(max_lrg_id + 1);
386 _phc._cfg.map_node_to_block(copy, b);
387 //tty->print_cr("Split a debug use in Aggressive Coalesce");
388 } // End of if high frequency use/def
389 } // End of for all debug inputs
390 } // End of if low frequency safepoint
391
392 } // End of if Phi
393
394 } // End of for all instructions
395 } // End of for all blocks
396 }
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275 }
276 // Check for mismatch inputs to Phi
277 for (uint j = 1; j < cnt; j++) {
278 Node *m = n->in(j);
279 uint src_name = _phc._lrg_map.find(m);
280 if (src_name != phi_name) {
281 Block *pred = _phc._cfg.get_block_for_node(b->pred(j));
282 Node *copy;
283 assert(!m->is_Con() || m->is_Mach(), "all Con must be Mach");
284 // Rematerialize constants instead of copying them.
285 // We do this only for immediate constants, we avoid constant table loads
286 // because that will unsafely extend the live range of the constant table base.
287 if (m->is_Mach() && m->as_Mach()->is_Con() && !m->as_Mach()->is_MachConstant() &&
288 m->as_Mach()->rematerialize()) {
289 copy = m->clone();
290 // Insert the copy in the predecessor basic block
291 pred->add_inst(copy);
292 // Copy any flags as well
293 _phc.clone_projs(pred, pred->end_idx(), m, copy, _phc._lrg_map);
294 } else {
295 const RegMask *rm = C->matcher()->idealreg2spillmask[static_cast<uint>(m->ideal_reg())];
296 copy = new MachSpillCopyNode(MachSpillCopyNode::PhiInput, m, *rm, *rm);
297 // Find a good place to insert. Kinda tricky, use a subroutine
298 insert_copy_with_overlap(pred,copy,phi_name,src_name);
299 }
300 // Insert the copy in the use-def chain
301 n->set_req(j, copy);
302 _phc._cfg.map_node_to_block(copy, pred);
303 // Extend ("register allocate") the names array for the copy.
304 _phc._lrg_map.extend(copy->_idx, phi_name);
305 } // End of if Phi names do not match
306 } // End of for all inputs to Phi
307 } else { // End of if Phi
308
309 // Now check for 2-address instructions
310 uint idx;
311 if( n->is_Mach() && (idx=n->as_Mach()->two_adr()) ) {
312 // Get the chosen name for the Node
313 uint name = _phc._lrg_map.find(n);
314 assert (name, "no 2-address specials");
315 // Check for name mis-match on the 2-address input
316 Node *m = n->in(idx);
317 if (_phc._lrg_map.find(m) != name) {
318 Node *copy;
319 assert(!m->is_Con() || m->is_Mach(), "all Con must be Mach");
320 // At this point it is unsafe to extend live ranges (6550579).
321 // Rematerialize only constants as we do for Phi above.
322 if (m->is_Mach() && m->as_Mach()->is_Con() && !m->as_Mach()->is_MachConstant() &&
323 m->as_Mach()->rematerialize()) {
324 copy = m->clone();
325 // Insert the copy in the basic block, just before us
326 b->insert_node(copy, l++);
327 l += _phc.clone_projs(b, l, m, copy, _phc._lrg_map);
328 } else {
329 const RegMask *rm = C->matcher()->idealreg2spillmask[static_cast<uint>(m->ideal_reg())];
330 copy = new MachSpillCopyNode(MachSpillCopyNode::TwoAddress, m, *rm, *rm);
331 // Insert the copy in the basic block, just before us
332 b->insert_node(copy, l++);
333 }
334 // Insert the copy in the use-def chain
335 n->set_req(idx, copy);
336 // Extend ("register allocate") the names array for the copy.
337 _phc._lrg_map.extend(copy->_idx, name);
338 _phc._cfg.map_node_to_block(copy, b);
339 }
340
341 } // End of is two-adr
342
343 // Insert a copy at a debug use for a lrg which has high frequency
344 if (b->_freq < OPTO_DEBUG_SPLIT_FREQ || _phc._cfg.is_uncommon(b)) {
345 // Walk the debug inputs to the node and check for lrg freq
346 JVMState* jvms = n->jvms();
347 uint debug_start = jvms ? jvms->debug_start() : 999999;
348 uint debug_end = jvms ? jvms->debug_end() : 999999;
349 for(uint inpidx = debug_start; inpidx < debug_end; inpidx++) {
356 uint nidx = _phc._lrg_map.live_range_id(inp);
357 LRG &lrg = lrgs(nidx);
358
359 // If this lrg has a high frequency use/def
360 if( lrg._maxfreq >= _phc.high_frequency_lrg() ) {
361 // If the live range is also live out of this block (like it
362 // would be for a fast/slow idiom), the normal spill mechanism
363 // does an excellent job. If it is not live out of this block
364 // (like it would be for debug info to uncommon trap) splitting
365 // the live range now allows a better allocation in the high
366 // frequency blocks.
367 // Build_IFG_virtual has converted the live sets to
368 // live-IN info, not live-OUT info.
369 uint k;
370 for( k=0; k < b->_num_succs; k++ )
371 if( _phc._live->live(b->_succs[k])->member( nidx ) )
372 break; // Live in to some successor block?
373 if( k < b->_num_succs )
374 continue; // Live out; do not pre-split
375 // Split the lrg at this use
376 const RegMask *rm = C->matcher()->idealreg2spillmask[static_cast<uint>(inp->ideal_reg())];
377 Node* copy = new MachSpillCopyNode(MachSpillCopyNode::DebugUse, inp, *rm, *rm);
378 // Insert the copy in the use-def chain
379 n->set_req(inpidx, copy );
380 // Insert the copy in the basic block, just before us
381 b->insert_node(copy, l++);
382 // Extend ("register allocate") the names array for the copy.
383 uint max_lrg_id = _phc._lrg_map.max_lrg_id();
384 _phc.new_lrg(copy, max_lrg_id);
385 _phc._lrg_map.set_max_lrg_id(max_lrg_id + 1);
386 _phc._cfg.map_node_to_block(copy, b);
387 //tty->print_cr("Split a debug use in Aggressive Coalesce");
388 } // End of if high frequency use/def
389 } // End of for all debug inputs
390 } // End of if low frequency safepoint
391
392 } // End of if Phi
393
394 } // End of for all instructions
395 } // End of for all blocks
396 }
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